发明名称 |
METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH REDUCED JUNCTION DIFFUSION |
摘要 |
<p>METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH REDUCED JUNCTION DIFFUSION A transistor which includes halo regions disposed in a substrate adjacent to opposing sides of the gate. The halo regions have upper and lower regions. The upper region is a crystalline region with excess vacancies and the lower region is an amorphous region. Source/drain diffusion regions are disposed in the halo regions. The source/drain diffusion regions overlap the upper and lower halo regions. This architecture offers the minimal extension resistance as well as minimum lateral diffusion for better CMOS device scaling.</p> |
申请公布号 |
SG151209(A1) |
申请公布日期 |
2009.04.30 |
申请号 |
SG20080068363 |
申请日期 |
2008.09.16 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD |
发明人 |
COLOMBEAU BENJAMIN;HOOI YEONG SAI;BENISTANT FRANCIS;INDAJANG BANGUN;LAP CHAN |
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