| 摘要 |
PROBLEM TO BE SOLVED: To provide a differential amplification circuit which can reduce an input offset voltage without damaging the margin of an operation power supply voltage and without increasing a chip area. SOLUTION: A differential amplification circuit is constituted of a differential transistor pair 1 including a pair of N-channel MOS transistors M1, M2, a constant current source circuit 2 which is connected to the sources of the differential transistor pair 1, a current-mirror load circuit 3 including a pair of P-channel MOS transistors M3, M4, and a bias generation circuit 4 which generates a gate bias and a drain bias in such a way that one potential of each drain of the current mirror load circuit 3 is equal to the other potential thereof. COPYRIGHT: (C)2009,JPO&INPIT |
