| 摘要 |
PROBLEM TO BE SOLVED: To provide a processor capable of dynamically changing cache control in program operation and capable of effectively improving the use efficiency of a cache. SOLUTION: The processor (10) including a cache memory (132) therein controls use of the cache memory (132) based on operation mode information (43) which changeably designates use/no-use of the cache memory (132) and on designation of cache memory use in an access instruction word included in a program in accessing to a main storage memory (20) from the program (30) in operation. COPYRIGHT: (C)2009,JPO&INPIT
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