发明名称 METHOD, INTEGRATED CIRCUIT, AND COMMUNICATION UNIT FOR SCHEDULING A PROCESSING OF PACKET STREAM CHANNELS
摘要 <p>A method for scheduling a processing of packet stream channels comprises: determining whether at least one packet stream channel comprises a media frame ready for processing (210); if at least one packet stream channel comprises a media frame ready for processing, identifying a media frame ready for processing having a highest priority (230); and scheduling the identified highest priority media frame for processing (240). The method further comprises prioritising media frames ready for processing based on at least one of: a media frame availability time and an estimated processing time, for each media frame.</p>
申请公布号 WO2009053774(A1) 申请公布日期 2009.04.30
申请号 WO2007IB54302 申请日期 2007.10.23
申请人 FREESCALE SEMICONDUCTOR, INC.;STOICA, FLORIN-LAURENTIU 发明人 STOICA, FLORIN-LAURENTIU
分类号 H04L12/56 主分类号 H04L12/56
代理机构 代理人
主权项
地址
您可能感兴趣的专利