发明名称 TEMPERATURE COMPENSATION BIAS CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce power consumption and improve temperature-voltage fluctuating characteristic of a bias circuit used for a clock generation circuit to reduce the power consumption during standby in a sensor node. SOLUTION: The bias circuit comprises a reference circuit including first and second PMOS transistors of current mirror structure, third and fourth NMOS transistors of current mirror structure, and a resistor Rs connected between the fourth NMOS transistor and a ground voltage. The reference circuit further includes a fifth PMOS transistor having a drain connected to a node between the fourth NMOS transistor and the resistor Rs and a source and a gate connected to a power supply voltage. The voltage between gate/source of the fourth NMOS transistor is controlled using leak current of the fifth PMOS transistor. The bias circuit is used as a current source of a clock generation circuit such as a quartz oscillation circuit, whereby accurate clock can be generated at low power. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009093483(A) 申请公布日期 2009.04.30
申请号 JP20070264523 申请日期 2007.10.10
申请人 KOBE UNIV 发明人 YOSHIMOTO MASAHIKO;OTA CHIKARA;KAWAGUCHI HIROSHI;TAKEUCHI TAKASHI
分类号 G05F3/30;G05F3/26;H03F3/343 主分类号 G05F3/30
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