发明名称 |
MODULAR SQUARING IN BINARY FIELD ARITHMETIC |
摘要 |
After squaring an element of a binary field, the squaring result may be reduced modulo the field-defining polynomial g bits at a time. To this end, a lookup table may be employed, where the lookup table stores entries corresponding to reducing g-bit-long polynomials modulo the field-defining polynomial. Such a reducing strategy may be shown to be more efficient than a bit-by-bit reducing strategy.
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申请公布号 |
CA2642421(A1) |
申请公布日期 |
2009.04.30 |
申请号 |
CA20082642421 |
申请日期 |
2008.10.31 |
申请人 |
RESEARCH IN MOTION LIMITED |
发明人 |
EBEID, NEVINE MAURICE NASSIF |
分类号 |
G06F7/72;H04L9/28;H04W12/02 |
主分类号 |
G06F7/72 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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