A NEW ESD DEVICE WITH LOW TRIGGER VOLTAGE AND LOW LEAKAGE
摘要
An ESD device invention comprises first and second transistors formed in a substrate, each having a source, a drain and a gate, the source and drain of the first transaction being connected between ground and an I/O pin or input, the gate of the first transistor being connected to ground and the source and drain of the second transistor being connected between the substrate of the first transistor and the I/O pin or input; first and second capacitors connected in series between ground and the I/O pin or input; and at least a third transistor connected between ground and a node between the first and second capacitors to which the gate of the second transistor is also connected.
申请公布号
WO2007005472(A3)
申请公布日期
2009.04.30
申请号
WO2006US25197
申请日期
2006.06.26
申请人
ALTERA CORPORATION;O, HUGH-SUNGKI;SHIH, CHIH-CHING;HUANG, CHENG-HSIUNG;LIU, YOW-JUANG, BILL
发明人
O, HUGH-SUNGKI;SHIH, CHIH-CHING;HUANG, CHENG-HSIUNG;LIU, YOW-JUANG, BILL