发明名称 |
Method, System and Program Product for Address Translation Through an Intermediate Address Space |
摘要 |
In a data processing system capable of concurrently executing multiple hardware threads of execution, an intermediate address translation unit in a processing unit translates an effective address for a memory access into an intermediate address. A cache memory is accessed utilizing the intermediate address. In response to a miss in cache memory, the intermediate address is translated into a real address by a real address translation unit that performs address translation for multiple hardware threads of execution. The system memory is accessed with the real address.
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申请公布号 |
US2009113164(A1) |
申请公布日期 |
2009.04.30 |
申请号 |
US20070928125 |
申请日期 |
2007.10.30 |
申请人 |
RAJAMONY RAMAKRISHNAN;SPEIGHT WILLIAM E;ZHANG LIXIN |
发明人 |
RAJAMONY RAMAKRISHNAN;SPEIGHT WILLIAM E.;ZHANG LIXIN |
分类号 |
G06F9/26 |
主分类号 |
G06F9/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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