DATA REPRODUCTION CIRCUIT

摘要

an input phase detection circuit for outputting a gate signal synchronized with an input data rise phase even when a jitter component is superimposed on a in put burst optical signal; a gate-equipped multi-phase oscillator for instantaneously oscillating an N-phase clock by using the gate signal as a trigger; a data identification reproduction circuit for outputting sampling data on the input data synchronized with the clock; a continuous clock generation circuit for generating a continuous clock as a reference clock; a continuous clock synchronization circuit for outputting the sampling data synchronized with the continuous clock as the phase-synchronized data; and a phase selector for selecting phase-synchronized data of the optimal identification phase having the greatest phase margin for the input data and outputting it as reproduction data. Thus, it is possible to reproduce data identified rapidly by the optimal identification phase from the input data and output the data synchronized with the reference clock.