| 摘要 |
A fractional-N frequency synthesizer including a phase detector, a voltage controlled oscillator, a divider, and a sigma-delta modulator. The phase detector detects a phase difference between a reference signal and a feedback signal. The voltage controlled oscillator receives a phase difference control signal based on the detected phase difference and oscillates a signal with a frequency based on the phase difference. The divider selects a value from at least three integers according to a predetermined selection signal, divides the frequency of the oscillated signal output from the voltage controlled oscillator by the selected value, and outputs a divided signal as a feedback signal to the phase detector. The sigma-delta modulator adds a predetermined input value to an internal feedback value, successively accumulates added values, quantizes the an accumulated value to at least three levels, and converts a quantized value into the predetermined selection signal.
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