| 摘要 |
The present invention discloses correlation architecture in the application of full-digital GPS (Global Positioning System) receivers. According to the present invention, a satellite C/A code generator is employed to generate N-bit parallel code data at a time, and a Doppler frequency generator is used to generate N-bit parallel Doppler frequency data at a time. Signals received by the receiver can be temporarily stored in a buffer that provides N-bit parallel reception data to a correlation circuit. In the correlation circuit, a N-bit multiplier is used to multiply the N-bit reception data by the N-bit C/A code data and the N-bit Doppler frequency data to generate multiplication results. The N-bit multiplication results are thereafter summed up in parallel by a digital summator. Accordingly, the correlator of the present invention can improve circuit performance and save the required cost.
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