发明名称 Controllable varactor within dummy substrate pattern
摘要 A dummy region varactor for improving a CMP process and improving electrical isolation from active areas and a method for forming the same, the varactor including a semiconductor substrate having a dummy region said dummy region including a first well region having a first polarity; shallow trench isolation (STI) structures disposed in the dummy region defining adjacent mesa regions comprising first, second, and third mesa regions; a second well region having a second polarity underlying the first mesa region having the second polarity to form a PN junction interface; wherein said second and third mesa regions having the first polarity are formed adjacent either side of said first mesa region.
申请公布号 US7525177(B2) 申请公布日期 2009.04.28
申请号 US20050097743 申请日期 2005.04.01
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 CHENG CHUNG-LONG;THEI KONG-BENG;LIN SHENG-YUAN
分类号 H01L29/93 主分类号 H01L29/93
代理机构 代理人
主权项
地址