发明名称 Gate electrode having a capping layer
摘要 A method of manufacturing a semiconductor device and a novel semiconductor device are disclosed herein. An exemplary method includes sputtering a capping layer in-situ on a gate dielectric layer, before any high temperature processing steps are performed.
申请公布号 US7524727(B2) 申请公布日期 2009.04.28
申请号 US20050322745 申请日期 2005.12.30
申请人 INTEL CORPORATION 发明人 DEWEY GILBERT;DOCZY MARK L.;DATTA SUMAN;BRASK JUSTIN K.;METZ MATTHEW V.
分类号 H01L21/336 主分类号 H01L21/336
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