发明名称 Memory device
摘要 A memory device includes a memory cell having a capacitor for accumulating electric charges in accordance with the logic of data, a bit line connected to the memory cell, a charge transfer circuit for transferring the electric charges in the bit line to an output node, a dummy memory cell connected to the bit line, and a control circuit for controlling the charge transfer ability of the charge transfer circuit in accordance with the change in the voltage of the bit line.
申请公布号 US7525846(B2) 申请公布日期 2009.04.28
申请号 US20060485553 申请日期 2006.07.13
申请人 FUJITSU MICROELECTRONICS LIMITED 发明人 MORITA KEIZO;KAWASHIMA SHOICHIRO
分类号 G11C11/03 主分类号 G11C11/03
代理机构 代理人
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