| 摘要 |
Circuits, architectures, a system and methods for adjusting spacing between a data writing mechanism and a data storage medium. The circuit generally includes (a) adjustment logic configured to (i) determine a first length of time of a write operation to a data storage medium, and (ii) determine a second length of time between the first write operation and a second write operation, (b) a controller configured to adjust a state variable of a write signal to a mechanism that writes data to the storage medium in accordance with the first and second lengths of time, and (c) an output circuit providing the write signal to the write mechanism. The method generally includes the steps of (1) determining a first length of time for a first write operation; and (2) determining a second length of time between the first write operation and a second write operation; and (3) adjusting at least one state variable of a write signal provided to the data writing mechanism in accordance with the determining steps. The present invention advantageously reduces adverse spacing modulation between the writing mechanism and the storage medium, thereby enabling improved data integrity, reduced bit error rates, and "cold write" operations.
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