摘要 |
An input circuit can minimize a circuit area required for data prefetch operation for an increased bit number of prefetch data. A control signal generating unit generates a plurality of control signals in response to a clock signal and a data strobe signal, wherein external data are input in synchronism with the data strobe signal. A synchronizing unit for aligns the input data into N-bit data in parallel by performing a data alignment operation at least three times, N being a positive integer larger than one.
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