| 摘要 |
The present invention provides a buffer circuit meeting both of low power consumption requirement and an improvement in slew rate characteristics which are in a relation of trade off. Voltage difference detection circuits are provided for detecting a voltage difference between the input signal at rising and at trailing and an output signal. Based on the voltage difference, voltage-current conversion circuits increase a bias current to be supplied to an output NMOS transistor m1 and a source terminal of an output PMOS transistor constituting an output circuit. And, the voltage difference detection circuits have offset voltages. Only when the voltage difference changes into a level higher than the offset voltage, that is, when the input signal changes abruptly (rise or down), bias current increases.
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