发明名称 Semiconductor device having D/A conversion portion
摘要 A DAC having a memory mat including a plurality of first memory cells, and a plurality of output lines connected to the plurality of first memory cells. Each of the plurality of memory cells has a first memory portion including bipolar transistors and storing information in non-volatility based on whether a junction of the bipolar transistors is destroyed or not, and a second memory portion connected to the first memory portion and for outputting information to corresponding one of the plurality of output lines. The DAC has a first mode in which information is transferred from the first memory portions to the second memory portions when the information is written into the second memory portions, and a second mode in which the second memory portions are specified externally and information is written into the second memory portions. Thus, the performance of a D/A converter can be improved.
申请公布号 US7522083(B2) 申请公布日期 2009.04.21
申请号 US20070877561 申请日期 2007.10.23
申请人 HITACHI, LTD. 发明人 SAHARA RYUSUKE;KUSUNOKI MITSUGU;MORI KAZUTAKA;KOGAYU HIROSHIGE
分类号 H03M1/78 主分类号 H03M1/78
代理机构 代理人
主权项
地址