发明名称 Translational phase locked loop using a quantized interpolated edge timed synthesizer
摘要 A direct digital synthesizer (DDS) such as a Quantized Interpolated Edge Timed (QuIET) synthesizer is implemented in the feedback path of a translational Phase Lock Loop (PLL). The frequency translation introduced by the synthesizer reduces the amplification of reference feedback path noise sources, thereby enabling a wider loop bandwidth and improving high-pass filtering of phase noise without the addition of a second PLL.
申请公布号 US7521974(B2) 申请公布日期 2009.04.21
申请号 US20060443971 申请日期 2006.05.31
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 KIRSCHENMANN MARK A.
分类号 H03L7/06 主分类号 H03L7/06
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