发明名称 |
DUAL INTERFACE MEMORY ARRANGEMENT AND METHOD |
摘要 |
The present invention provides for a dual interface memory arrangement employing the checkered memory mapping formed from combined vertically and horizontally sliced memory mapping, and including 2D access means arranged for access to the mapping memory wherein the said to the access means is arranged such that the access overlaps memory mapped to both interfaces both horizontally and vertically, and which arrangement preferably provides for two DTL channels for each interface wherein a highly efficient unified memory arrangement can be achieved for all processing aspects such as CPU, audio, video and gfx processing. |
申请公布号 |
EP2044776(A2) |
申请公布日期 |
2009.04.08 |
申请号 |
EP20070805096 |
申请日期 |
2007.07.10 |
申请人 |
NXP B.V. |
发明人 |
DE PERTHUIS, HUGUES, J., M.;DESMICHT, ERIC |
分类号 |
H04N7/26;G06F12/02;G09G5/39 |
主分类号 |
H04N7/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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