| 摘要 |
A processor control system allows stored program code to be replaced. The original code can be stored entirely in a first memory, for example a ROM, with correction instructions stored in a second memory, for example a RAM, and the second memory is accessed only when a correction instruction exits. Received memory addresses are divided into a first plurality of most significant bits, and a second plurality of least significant bits. Only when the second plurality of least significant bits are all equal to zero, and there is a correction instruction stored in the RAM with an address which equals the most significant bits, the correction instruction is read and supplied to the processor. This, employs relatively little additional hardware, and the efficiency of the system is improved.
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