发明名称 Semiconductor device and manufacturing method thereof
摘要 After an interlayer insulation film (1) and a CMP stopper film are formed, wiring trenches are formed. Next, after a barrier metal film (4) and a Cu film (5) are buried in the wiring trenches, the Cu film (5) and the barrier metal film (4) are planarized by CMP or the like until the CMP stopper film is exposed, whereby lower wirings (17) are formed. Next, the CMP stopper film is removed by dry etching, so that surfaces of the lower wirings (17) relatively protrude from their surrounding area. Subsequently, an etching stopper film (6) is formed on the entire surface. Thereafter, via plugs (18) are formed, and upper wirings (19) are further formed in the same manner as the lower wirings (17).
申请公布号 US7514792(B2) 申请公布日期 2009.04.07
申请号 US20060393655 申请日期 2006.03.31
申请人 FUJITSU LIMITED 发明人 HASEGAWA AKIHIRO
分类号 H01L23/48;H01L21/768;H01L23/52;H01L23/522;H01L23/528;H01L23/532 主分类号 H01L23/48
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