发明名称 SHIFT-ADD MECHANISM
摘要 A method to perform a shift-add operation on two values loaded in two memories of a processor where the first memory has a low bit (LB) and a high bit (HB). If the LB is zero, then this is case (1), if the HB is also zero, shifting the first value lower one bit-position and setting the HB to zero, thereby arriving at a new value in the first memory, and alternately if the HB is one, then this is case (2), and proceed shifting the first value lower one bit-position and setting the HB to one, thereby arriving at the new value. However, if the LB is one, then adding the second value to the first value in the first memory and if this does not produce a carry, proceeding as if at case (1) and otherwise proceeding as if at case (2).
申请公布号 WO2009042106(A2) 申请公布日期 2009.04.02
申请号 WO2008US10999 申请日期 2008.09.23
申请人 VNS PORTFOLIO LLC;MOORE, CHARLES, H. 发明人 MOORE, CHARLES, H.
分类号 G06F7/50 主分类号 G06F7/50
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