发明名称 SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device with a simple feedback transistor for writing. SOLUTION: The semiconductor memory device is provided with: a latch circuit latching first and second potential levels based on "1" and "0" to a sense node; a first feedback transistor which is connected between a voltage source for writing "1" and a first bit line and has a gate connected to the first sense node; and a second feedback transistor which is connected between a first power source and a second bit line and has a gate connected to the second sense node. The first potential level is set to control the first feedback transistor so that the first bit line is connected to the first power source, and the second potential level is set to control the second feedback transistor so that a write potential between a read potential applied to the bit line in reading data and the potential of the first voltage power source is applied to the second bit line. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009070508(A) 申请公布日期 2009.04.02
申请号 JP20070239544 申请日期 2007.09.14
申请人 TOSHIBA CORP 发明人 FUJITA KATSUYUKI
分类号 G11C11/4091;G11C11/404 主分类号 G11C11/4091
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