发明名称 Method and System for Mapping Source Elements to Destination Elements as Interconnect Routing Assignments
摘要 Aspects for optimized mapping of source elements to destination elements as interconnect routing assignments are described. The aspects include utilizing chosen rules to establish a priority for mapping, and generating mapping assignments based on the priority. The mapping assignments are recursively refined to converge on an optimized solution.
申请公布号 US2009089722(A1) 申请公布日期 2009.04.02
申请号 US20080331218 申请日期 2008.12.09
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 LOCKMAN TYLER J.;LANDRY PHUONG HA-UYEN
分类号 G06F17/50 主分类号 G06F17/50
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