| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a phase clock generator which can generate a clock signal on which high frequency characteristics are reflected even while using a smaller number of transistors, has no limit in an achievable clock frequency band, whose circuit size and power consumption are minimized, by which semiconductor design and processes are facilitated, and which can generate a high frequency clock signal on which operation frequencies of the transistors are reflected as they are, and minimize the influence of noise components. <P>SOLUTION: The phase clock generator includes: transistors which are connected between a power line and a grounding line and are provided in a form of a 4xN matrix and to which a plurality of phase-delayed signals are input through their gate terminals, wherein among four transistors which form a unit column, the first two transistors form a pair of NMOS transistors, and the second two transistors form a pair of PMOS transistors; and a buffer which is connected to a line between the pair of the NMOS transistors and the pair of the PMOS transistors forming the unit column, to transmit a clock signal. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
