发明名称 |
Method for reliable injection of deterministic jitter for high speed transceiver simulation |
摘要 |
A method and a corresponding system for characterizing the performance of a clock and data recovery circuit in a digital transceiver is presented. The method comprises phase modulating a jitter-free data signal by a testing signal having added data jitter and measuring the time the clock and data recovery system takes to achieve bit lock of a phase modulated signal. Data uncorrelated timing jitter corresponding to a user defined probability distribution is included in the jitter testing signal. Utilization of a variable probability distribution in generating data uncorrelated timing jitter, as provided by the present invention, allows for greater flexibility and accuracy in clock and data recovery circuit testing and characterization.
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申请公布号 |
US2009086801(A1) |
申请公布日期 |
2009.04.02 |
申请号 |
US20070904687 |
申请日期 |
2007.09.27 |
申请人 |
LIU XIN;ZHANG LIANG;XIN JIANG LI |
发明人 |
LIU XIN;ZHANG LIANG;XIN JIANG LI |
分类号 |
H04B3/46 |
主分类号 |
H04B3/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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