发明名称 DISPLAY DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To suppress the variance of pulse transient occurring in a buffer final stage part connected to a scan pulse line of an image display device. <P>SOLUTION: The display device includes a write scan circuit 12ab. A power source Pvcc generates a voltage Vccv changing synchronously with a clock signal being a reference of write scan pulse generation. A transistor Tr1 controls the magnitude of a flowing current to control the waveform of a write scan pulse. In this case, a voltage according to the mobility of the transistor Tr1, which is held in a binding capacity C, is fed back to a gate of the transistor Tr1 to correct the variance of the mobility of the transistor Tr1, and the write scan pulse wherein the variance of pulse transient is corrected is generated. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009069621(A) 申请公布日期 2009.04.02
申请号 JP20070239453 申请日期 2007.09.14
申请人 SONY CORP 发明人 YAMASHITA JUNICHI;UCHINO KATSUHIDE
分类号 G09G3/30;G09G3/20;H01L51/50 主分类号 G09G3/30
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