| 摘要 |
A transistor in a semiconductor device and a method for manufacturing the same are provided to compensate for the threshold voltage decrease of transistor by thickly forming the gate insulating layer of the gate edge part overlapped with the semiconductor board activation region. The active region is restricted by the element isolation film on the top of semiconductor substrate(20). A gate(22) crosses the active region. A gate insulating layer(21) is interposed in the lower part of the gate. The gate insulating layer has the relatively thicker thickness in the edge region of the gate overlapped with the active region of the semiconductor substrate. The threshold voltage decrease of transistor by the HEIP(Hot Electron Induced Punch-through) phenomenon is compensated by thickly forming the gate insulating layer on the edge region of the channel region. A gate spacer(23) is formed on the side wall of the gate and the gate insulating layer. A source/drain region(S,D) is formed in the active region of the semiconductor substrate.
|
