发明名称 |
Method for manufacturing memory cell |
摘要 |
The invention is directed to a memory cell on a substrate having a plurality of shallow trench isolations form therein, wherein top surfaces of the shallow trench isolations are lower than a top surface of the substrate and the shallow trench isolations together define a vertical fin structure of the substrate. The memory comprises a straddle gate, a carrier trapping layer and at least two source/drain regions. The straddle gate is located on the substrate and straddles over the vertical fin structure. The carrier trapping layer is located between the straddle gate and the substrate. The source/drain regions are located in a portion of the vertical fin structure of the substrate exposed by the straddle gate.
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申请公布号 |
US7510924(B2) |
申请公布日期 |
2009.03.31 |
申请号 |
US20070836142 |
申请日期 |
2007.08.09 |
申请人 |
MACRONIX INTERNATIONAL CO., LTD. |
发明人 |
HSU TZU-HSUAN;LAI ERH-KUN;LUE HANG-TING;HO CHIA-HUA |
分类号 |
H01L21/337 |
主分类号 |
H01L21/337 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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