发明名称 Semiconductor testing system and testing method
摘要 According to an embodiment of the invention, a semiconductor testing system for testing a semiconductor device including an output buffer switching between a first mode for outputting data based on an input test signal and a second mode for setting an output terminal to a high impedance state, includes: a test signal generator supplying the test signal to the semiconductor device; an external tester setting an output terminal of the output buffer to a predetermined potential if the output buffer is set to the second mode; and a detecting circuit measuring a potential of an output of the output buffer, the detecting circuit detecting a stuck-at fault in the semiconductor device based on the data if the test signal designates the first mode and detecting a stuck-at fault in the semiconductor device based on the predetermined potential if the test signal designates the second mode.
申请公布号 US7511506(B2) 申请公布日期 2009.03.31
申请号 US20070649225 申请日期 2007.01.04
申请人 NEC ELECTRONICS CORPORATION 发明人 HARADA EIJI
分类号 G01R31/08 主分类号 G01R31/08
代理机构 代理人
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