发明名称 Fine-grained power management of synchronous and asynchronous datapath circuits
摘要 A power management circuit is provided for controlling power dissipation in at least one combinational logic circuit. The power management circuit includes a detector operative to receive at least a first input signal to the combinational logic circuit and to detect a transition of the first input signal between a first logic state and a second logic state. The detector generates a control signal indicative of whether or not a transition of the first input signal has occurred. The power management circuit further includes a controller operative to receive the first control signal generated by the detector and to selectively disconnect the first combinational logic circuit from a power supply to the first combinational logic circuit when no logic transition of the first input signal is detected between a preceding computational cycle and a present computational cycle of the first combinational logic circuit, and to connect the first combinational logic circuit to the power supply when a logic transition of the first input signal is detected.
申请公布号 US7511535(B2) 申请公布日期 2009.03.31
申请号 US20070680225 申请日期 2007.02.28
申请人 AGERE SYSTEMS INC. 发明人 CHAKRABORTY KANAD;STRAUSS STEVEN E.;XU BINGXIONG
分类号 H03K19/00 主分类号 H03K19/00
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