| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a control technique for PWM power converters, wherein a voltage error due to a voltage drop mainly in switching elements can be compensated, and at the same time, timing of PWM signal switching can be controlled, and increase or decrease in soft computation load and the additional portion of a hard circuit can be restrained to a minimum. <P>SOLUTION: A semiconductor integrated circuit having a PWM signal generating means for generating a PWM signal is provided, as a PWM timer unit 100, with a counter 103A that counts the pulse width of a pulse signal externally input, while it is delayed from the PWM signal; a register 103B that fetches the counter value of the counter 103A, in synchronization with the PWM signal; and an A/D conversion means 104 for converting an analog signal that serves as the source signal of the pulse signal input from the outside, into a digital signal. <P>COPYRIGHT: (C)2009,JPO&INPIT |
