发明名称 TOPOLOGY MAP DISPLAY APPARATUS AND TOPOLOGY MAP ANALYSIS METHOD
摘要 PROBLEM TO BE SOLVED: To provide a method for performing topology map analysis, using smaller load. SOLUTION: The method for performing topology map analysis for analyzing the information of a physical connection network of a plurality of devices includes creating a data cell assigning the plurality of devices to each of X columns and X rows; registering data representing the number of hops "1" in the data cell, on the basis of one-hop connection information; finding out a first data cell with a data registration for an arbitrary Nth row; then finding out a second data cell with a data registration for a column including the first data cell. While by defining a column as an Mth column, to which the same device as a row including the second data cell is made to correspond, registering in the data cell of the Nth row and the Mth column data, representing the number of hops adding the number of hops registered in the first data cell and the number of hops registered in the second data cells repeatedly executed for each row and each data cell, a data table in which information about the number of hops between devices is registered in each data cell is generated. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009065697(A) 申请公布日期 2009.03.26
申请号 JP20080276188 申请日期 2008.10.27
申请人 FUNAI ELECTRIC CO LTD 发明人 SAKAI HIROTAKA
分类号 H04L12/28 主分类号 H04L12/28
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