发明名称 |
MEMORY CIRCUIT AND METHOD OF WRITING DATA ON AND READING OUT DATA FROM MEMORY CIRCUIT |
摘要 |
<p>A memory circuit comprises a first latch circuit and a second latch circuit into which input data is written with clock signal timing and which retains the written data, a data input circuit for inputting data to the first latch circuit and the second latch circuit when a Write Enable signal is in a state indicating writable, and a write-back circuit which inputs the data retained in the second latch circuit to the first latch circuit when the Write Enable signal is in a state indicating non-writable. The second latch circuit is so configured as to have a higher resistance to noise than the first latch circuit.</p> |
申请公布号 |
WO2009037770(A1) |
申请公布日期 |
2009.03.26 |
申请号 |
WO2007JP68258 |
申请日期 |
2007.09.20 |
申请人 |
IDE, MASAO;FUJITSU LIMITED;TANAKA, TOMOHIRO |
发明人 |
IDE, MASAO;TANAKA, TOMOHIRO |
分类号 |
H03K3/037 |
主分类号 |
H03K3/037 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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