发明名称 INTEGRATED CIRCUIT HAVING PADS AND INPUT/OUTPUT (I/O) CELLS
摘要 A pad (20) is electrically connected to a first I/O cell (14) while also physically overlying active circuitry of a second I/O cell (16). Note that although the pad (20) overlies the second I/O cell (16), the pad (20) is not electrically connected to the I/O cell (16). Such a pattern may be replicated in any desired manner so that the I/O cells (e.g. 300-310) may have a finer pitch than the corresponding pads (320-324 and 330-335). In addition, the size of the pads may be increased (e.g. pad 131 may be bigger than pad 130) while the width "c" of the I/O cells (132-135) does not have to be increased. Such a pattern (e.g. 500) may be arranged so that the area required in one or more dimensions may be minimized.
申请公布号 WO2007136932(A3) 申请公布日期 2009.03.26
申请号 WO2007US65619 申请日期 2007.03.30
申请人 FREESCALE SEMICONDUCTOR INC.;TRAN, TU-ANH N.;VO, NHAT D.;CARPENTER, BURTON J.;HONG, DAE Y.;MILLER, JAMES W.;PHILLIPS, KENDALL D. 发明人 TRAN, TU-ANH N.;VO, NHAT D.;CARPENTER, BURTON J.;HONG, DAE Y.;MILLER, JAMES W.;PHILLIPS, KENDALL D.
分类号 H01L23/52 主分类号 H01L23/52
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