TEMPERATURE DEPENDENT BIAS FOR MINIMAL STAND-BY POWER IN CMOS CIRCUITS

摘要

A circuit is disclosed which generates such a bias voltage (VWL) that when this bias voltage is received by a large plurality of devices of a semiconductor chip, power consumption is reduced in the stand-by mode at any particular operating temperature. The disclosed circuit contains at least one monitor FET (10), which is kept in its off-state, and which has common properties with the large plurality of FET devices. The temperature dependent leakage current of the monitor FET (10) is sensed, and used to generate the bias voltage (VWL) in proportion to the leakage current. This bias voltage (VWL) is received by the large plurality FET devices on their gate electrodes, or on their body terminals.