发明名称 SEMICONDCUTOR DEVICE, MEMORY SYSTEM AND CONTROL METHOD OF THE SEMICONDUCTOR DEVICE
摘要 A semiconductor device including a logic circuit and a test circuit is provided which comprises: a logic signal terminal that supplies a signal to the logic circuit; a latch circuit that latches a signal based on a synchronization signal from the test circuit; a first selection circuit that supplies an external signal from the logic signal terminal to one of the logic circuit and the latch circuit selectively based on a test mode signal; and a second selection circuit that supplies one of the external signal and a signal from the test circuit selectively to a memory.
申请公布号 US2009083592(A1) 申请公布日期 2009.03.26
申请号 US20080186140 申请日期 2008.08.05
申请人 FUJITSU MICROELECTRONICS LIMITED 发明人 TANAKA HIROYUKI;NAKAGAWA YUJI
分类号 G11C29/12;G06F11/27;H01L21/66 主分类号 G11C29/12
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