发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device having a passive element whose characteristics are adjustable even after manufacture by applying back bias voltage, and also to achieve highly efficient injection of holes without lowering charge holding characteristics in a non-volatile memory in which holes are injected into a charge accumulating layer from a gate electrode. SOLUTION: In the semiconductor device, a MOS varactor Qv including a gate dielectric 7 formed on a surface of an SOI layer 3, a gate electrode 8C formed on the gate dielectric 7, and a n<SP>+</SP>-type semiconductor region 17 formed on the SOI layers 3 located on both sides of the gate electrode 8C, is formed on a main surface of an SOI substrate formed of a supporting substrate 1, a BOX layer 2, and an SOI layer 3. The MOS varactor Qv is configured so that capacitance formed of the SOI layer 3, gate dielectric 7, and gate electrode 8C is varied by applying bias voltage to the supporting substrate 1 (p-type well 6) under the gate electrode 8C. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009064860(A) 申请公布日期 2009.03.26
申请号 JP20070229811 申请日期 2007.09.05
申请人 RENESAS TECHNOLOGY CORP 发明人 SUGII NOBUYUKI;TSUCHIYA RYUTA;KIMURA SHINICHIRO
分类号 H01L21/822;H01L21/8234;H01L21/8238;H01L27/04;H01L27/06;H01L27/08;H01L27/092;H01L29/786 主分类号 H01L21/822
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