| 摘要 |
A system for multiplication of multi-bit first and second values. A processor is provided that has first and second memories with bit-positions that can all be zero or one and where the first memory has a low bit (LB). The first value is arranged in the first memory so its LSB is in the first memory LB, and the remaining bit-positions in the first memory are set to zero. The second value is arranged in the second memory such that its LSB is in the bit-position of the second memory that is next higher in order than the MSB of the first value in the first memory, and the remaining bit-positions in the second memory are set to zero. A +* operation is then performed a quantity of times equaling the number of significant bits in the first value, inclusive, thus obtaining the product of the first and second values.
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