发明名称 |
Time Delay Line with Low Sensitivity to Process Variations |
摘要 |
A time delay line comprises a plurality of delay elements connected in series. Each delay element comprises one or more transistors that exhibit a reverse short channel effect at channel lengths within a certain range. The transistors are configured to have a channel length in the certain range in order to reduce time delay sensitivity to process variations.
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申请公布号 |
US2009079487(A1) |
申请公布日期 |
2009.03.26 |
申请号 |
US20070861353 |
申请日期 |
2007.09.26 |
申请人 |
TELEFONAKTIEBOLAGET LM ERICSSON (PUBL) |
发明人 |
ARNBORG TORKEL;STRANDBERG ROLAND |
分类号 |
H03H11/26 |
主分类号 |
H03H11/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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