发明名称 BIPOLAR JUNCTION TRANSISTOR WITH A REDUCED COLLECTOR-SUBSTRATE CAPACITANCE
摘要 A process for forming a bipolar junction transistor (BJT) in a semiconductor substrate and a BJT formed according to the process. A buried isolation region is formed underlying BJT structures to isolate the BJT structures from the p-type semiconductor substrate. To reduce capacitance between a BJT subcollector and the buried isolation region, prior to implanting the subcollector spaced-apart structures are formed on a surface of the substrate. The subcollector is formed by implanting ions through the spaced-apart structures and through a region intermediate the spaced-apart structures. The formed BJT subcollector therefore comprises a body portion and end portions extending therefrom, with the end portions disposed at a shallower depth than the body portion, since the ions implanting the end portions must pass through the spaced-apart structures. The shallower depth of the end portions reduces the capacitance.
申请公布号 KR20090031354(A) 申请公布日期 2009.03.25
申请号 KR20087030024 申请日期 2008.12.09
申请人 AGERE SYSTEMS INC. 发明人 CHEN ALAN SANGONE;DYSON MARK VICTOR;HARRIS EDWARD BELDEN;KERR DANIEL CHARLES;NAGY WILLIAM JOHN
分类号 H01L29/73;H01L29/08;H01L29/732 主分类号 H01L29/73
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