发明名称 FFT processor
摘要 An N-point FFT processor 100 suitable for large data inputs (e.g. 2 k or 8 k-point input data) is formed from a m-point FFT processor unit 10 and a n-point FFT processor unit 20 in combination, where N=m×n and m and n are any positive integers. First, second and third permutation units 31, 32 & 33 perform global permutations on the data passing through the FFT processor. A twiddle factor unit 40 applies twiddle factors. A digital signal processing apparatus 1100 (FIG. 11) comprising the FFT processor 100 is also described. Further, a testing apparatus 1200 (FIG. 12) is described for testing an N-point FFT processor 100 by selecting amongst a plurality of m-point FFT processor units 10-10c and a plurality of n-point FFT processor units 20a-2c.
申请公布号 GB2448755(B) 申请公布日期 2009.03.25
申请号 GB20070008181 申请日期 2007.04.27
申请人 UNIVERSITY OF BRADFORD 发明人 SIMON JOHN SHEPHERD;JAMES MACKENZIE NORAS;YUAN ZHOU
分类号 G06F17/14 主分类号 G06F17/14
代理机构 代理人
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