发明名称 |
PROCESSING ELEMENT(PE) STRUCTURE FORMING FLOATING POINT-RECONFIGURABLE ARRAY(FP-RA) AND FP-RA CONTROL CIRCUIT FOR CONTROLLING THE SAME FP-RA |
摘要 |
A processing element structure forming FP-RA(Floating Point-Reconfigurable Array) and FP-RA control circuit for controlling the same FP-RA are provided to reduce a usage of memory by using a PE structure for floating point arithmetic. A PE(Processing Element) structure forming FP-RA(Floating Point-Reconfigurable Array) and FP-RA control circuit for controlling the same FP-RA comprise following components. An ALU(Arithmetic Logic Unit)(122) is inputted two operand inputs and performs an operation. The ALU receives a single output from each of two MUX(124a,124b). A shifter(126) performs a shift operation to the results of the ALU. A temporary register stores an intermediate result of the ALU and an intermediate result of the shifter. An output register(127) stores a final result of the ALU and a final result of the shifter. The PE structure has a data path between the above components for floating point arithmetic.
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申请公布号 |
KR20090030498(A) |
申请公布日期 |
2009.03.25 |
申请号 |
KR20070095852 |
申请日期 |
2007.09.20 |
申请人 |
SNU R&DB FOUNDATION;CORE LOGIC INC. |
发明人 |
YANG, HOON MO;JO, MAN HWEE;PARK, IL HYUN;CHOI, KI YOUNG |
分类号 |
G06F7/483 |
主分类号 |
G06F7/483 |
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