发明名称 Non-volatile semiconductor memory device having a two-layer gate electrode transistor and method of manufacturing the device
摘要 A non-volatile semiconductor memory device has a gate insulating film formed on a semiconductor substrate between isolation regions, a first gate electrode formed on the gate insulating film, an intergate insulating film formed on the first gate electrode, and a second gate electrode formed on the intergate insulating film. The first gate electrode has a first part positioned between isolation insulating films, a second part positioned on the first part and having a partial portion positioned on the isolation region, and a third part positioned on the second part. A width of the third part is set narrower than that of the second part.
申请公布号 US7508026(B2) 申请公布日期 2009.03.24
申请号 US20050263916 申请日期 2005.11.02
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 IINO NAOHISA;ARAI FUMITAKA
分类号 H01L27/115 主分类号 H01L27/115
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