发明名称 |
Dual layer bus architecture for system-on-a-chip |
摘要 |
A dual layer bus architecture for a system-on-a-chip (SOC) is disclosed. The bus architecture comprises a main bus adapted to connect a microprocessor, an image capture module, and a dual master module to a high density memory and a secondary memory operating independently of the main bus and adapted to connect the dual master module to a high-speed secondary memory.
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申请公布号 |
US7508981(B2) |
申请公布日期 |
2009.03.24 |
申请号 |
US20050200039 |
申请日期 |
2005.08.10 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
PARK HYUN-SANG |
分类号 |
G06K9/00;G06F13/00;G06F13/14 |
主分类号 |
G06K9/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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