发明名称 Circuit layout structure and method
摘要 A symmetrical circuit layout structure includes a number of signal wires, a ground wire and a dielectric layer. The signal wires include a first portion placed on a first plane and a second portion placed on a second plane. The ground wire includes a first portion placed above the first portion of the signal wires and adjacent to the second portion of the signal wires, and a second portion placed below the second portion of the signal wires and adjacent to the first portion of the signal wires. The dielectric layer is placed between the first plane and the second plane.
申请公布号 US7509615(B2) 申请公布日期 2009.03.24
申请号 US20050281477 申请日期 2005.11.18
申请人 REALTEK SEMICONDUCTOR CORP. 发明人 HUNG CHIH-CHIEN;WU MING-CHE
分类号 G06F17/50;H01L23/48;H01L23/52 主分类号 G06F17/50
代理机构 代理人
主权项
地址