发明名称 Method for treatment of samples for auger electronic spectrometer (AES) in the manufacture of integrated circuits
摘要 A method for analyzing a sample for the manufacture of integrated circuits, e.g. MOS transistors, application specific integrated circuits, memory devices, microprocessors, system on a chip. The method includes providing an integrated circuit chip, which has a surface area with at least one region of interest, e.g., bond pad. The method includes covering a first portion of the surface area including the region of interest using a blocking material. The method also forms a metal layer on a second portion of the surface area, while the blocking material protects the first portion. The method removes the blocking material to expose the first portion of the surface area including the region of interest. The method also subjects the metal layer to a voltage differential to draw away one or more charged particles from the first portion of the surface area. The method also subjects the surface area including the region of interest to spectrometer analysis.
申请公布号 US7504269(B2) 申请公布日期 2009.03.17
申请号 US20060378400 申请日期 2006.03.16
申请人 SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION 发明人 ZHANG QI HAU;LI MING;NIOU CHORNG SHYR;LIAO SCOTT
分类号 G01R31/26 主分类号 G01R31/26
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