发明名称 Static semiconductor memory device allowing simultaneous writing of data into a plurality of memory cells
摘要 A supply instruction signal attains the H-level before data is written into a plurality of memory cells. A P-channel MOS transistor is arranged between a power supply node and an input node. The P-channel MOS transistor is turned off to open the input node according to the supply instruction signal. In this case, a write driver discharges electric charges accumulated on the input node and electric charges accumulated on a bit line pair. However, a through-current does not flow from the power supply node to a ground node so that flow of the through-current to a CMOS inverter circuit forming each memory cell can be prevented. Accordingly, such a static semiconductor memory device can be provided that can prevent the flow of the through-current to the CMOS inverter circuit forming each memory cell when simultaneously writing data into the plurality of memory cells.
申请公布号 US7505339(B2) 申请公布日期 2009.03.17
申请号 US20060451312 申请日期 2006.06.13
申请人 RENESAS TECHNOLOGY CORP. 发明人 OHBAYASHI SHIGEKI
分类号 G11C29/00;G11C7/00 主分类号 G11C29/00
代理机构 代理人
主权项
地址