发明名称 Encryption mechanism on multi-core processor
摘要 An embodiment describes a method of implementing higher level and more robust encryption by using a multi-core processor. The clear text is segmented into text segments based on predefined segment lengths by master processor. Text segments are sent to processing elements which in turn encrypted and encrypted segments are sent back to master processor which is aggregated into encrypted text. To decrypt the text, encrypted text is split into encrypted segments per predefined lengths by master processor and sent to processing elements to be decrypted. The resulted plain text segments are sent back to master processor which is aggregated into original plain text.
申请公布号 US7506176(B1) 申请公布日期 2009.03.17
申请号 US20080045305 申请日期 2008.03.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 MIWA YOHICHI;MINAMI AYA
分类号 H04L9/32 主分类号 H04L9/32
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